SRS17 

         SRS17 - Capabilities #2
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____SRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808200 0x10808244

Size: 32

Offset: 0x44

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

LVSH

RO 0x1

Reserved_13

RO 0x0

VDD2S

RO 0x0

ADMA3SUP

RO 0x1

Reserved_11

RO 0x0

CLKMPR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RTNGM

RO 0x0

UTSM50

RO 0x0

Reserved_8

RO 0x0

RTNGCNT

RO 0x0

Reserved_7

RO 0x0

DRVD

RO 0x1

DRVC

RO 0x1

DRVA

RO 0x1

UHSII

RO 0x0

DDR50

RO 0x1

SDR104

RO 0x1

SDR50

RO 0x1

SRS17 Fields

Bit Name Description Access Reset
31 LVSH 
              LVSH - Low Voltage Signaling Host\n
              [list] [*] 1 - LVS Host [*] 0 - Not LVS Host [/list]
RO 0x1
30:29 Reserved_13 
Reserved bitfield added by Magillem
 RO 0x0
28 VDD2S 
              VDD2S - VDD2 Supported\n
              [list] [*] 1 - VDD2 supported [*] 0 - VDD2 not supported [/list]
RO 0x0
27 ADMA3SUP 
ADMA3SUP - ADMA3 Supported.\n
              [list] [*] 1 - ADMA3 supported [*] 0 - ADMA3 not supported [/list]
RO 0x1
26:24 Reserved_11 
Reserved bitfield added by Magillem
 RO 0x0
23:16 CLKMPR 
              CLKMPR - Clock Multiplier\n
              This field is to be 0 (fixed), as the Clock Multiplier is not supported.
RO 0x0
15:14 RTNGM 
              RTNGM - Re-Tuning Modes\n
              Depending on the retuning method, the some restrictions are assumed for the data length between re-tunings.\n
              The core can work with supporting one of the three method:\n
              [list] [*] 0 - Mode1: The software driver will use timer to calculate when the re-tuning is to be rerun. The data length between operations is limited to the 4MB. [*] 1 - Mode2: The driver will use either the re-tuning request (external input pin uhsi_retune_req is used for this purpose) or timer to predict when next retuning should be performed. The data length between operations is limited to the 4MB. [*] 2 - Mode3: This mode is similar to the mode2 with one exception. The core is able to perform auto retuning during the transmission, so data length limitation is not exists. [/list]
              Mode 3 is currently not supported.The driver can configure the timer by getting the RTNGCNT.This field is to be 0 or 1, because the mode 3 is not supported.
RO 0x0
13 UTSM50 
              UTSM50 - Use Tuning for SDR50\n
              [list] [*] 1 - tuning operation is necessary in SDR50 mode [*] 0 - tuning operation is not necessary in SDR50 mode [/list]
RO 0x0
12 Reserved_8 
Reserved bitfield added by Magillem
 RO 0x0
11:8 RTNGCNT 
              RTNGCNT - Timer Count for Re-Tuning\n
              These bits contain initial value for timer used to starting periodically Re-Tuning Operation.\n
              [list] [*] 0h - Re-Tuning Timer disabled [*] 1h - 1 second [*] ... [*] n - 2^(n-1) seconds [*] ... [*] Bh - 1024 seconds [*] Eh-Ch - Reserved [*] Fh - Obtain this info in other way [/list]
RO 0x0
7 Reserved_7 
Reserved bitfield added by Magillem
 RO 0x0
6 DRVD 
DRVD - 1.8V Line Driver Type D Supported\n
              [list] [*] 1 - Driver Type D supported [*] 0 - Driver Type D not supported [/list]
RO 0x1
5 DRVC 
DRVC - 1.8V Line Driver Type C Supported\n
              [list] [*] 1 - Driver Type C supported [*] 0 - Driver Type C not supported [/list]
RO 0x1
4 DRVA 
              DRVA - 1.8V Line Driver Type A Supported\n
              [list] [*] 1 - Driver Type A supported [*] 0 - Driver Type A not supported [/list]
RO 0x1
3 UHSII 
              UHSII - UHS-II / UHS-III Supported\n
              0 - UHS-II not supported
RO 0x0
2 DDR50 
              DDR50 - DDR50 Supported\n
              [list] [*] 1 - DDR50 mode supported [*] 0 - DDR50 mode not supported [/list]
RO 0x1
1 SDR104 
              SDR104 - SDR104 Supported\n
              [list] [*] 1 - SDR104 mode supported [*] 0 - SDR104 mode not supported [/list]
RO 0x1
0 SDR50 
              SDR50 - SDR50 Supported\n
              [list] [*] 1 - SDR50 mode supported [*] 0 - SDR50 mode not supported [/list]
RO 0x1