SRS04

         
            The SRS04 - SRS07 registers store the response returned by the card.\n
            The mapping of the actual device response and the SRS04 - SRS07 contents depends on the type of response.
            The type of response is determined by the RTS field (Response Type) for all user-defined commands.\n
            The separate cases are the Auto-CMD12 response (called R1b in the SD Memory Specification) and Auto-CMD23 response (called R1 in the SD Memory Specification).
            Auto-CMD12 and Auto-CMD23 responses are handled by the core automatically and goes to the SRS07 register regardless of the RTS value.\n

            SRS04-SRS07 relation to received response field:
            [list]
            [*] Auto-CMD12 resp: Response field R[39:8] - RESP3[31:0]\n
            [*] Auto-CMD23 resp: Response field R[39:8] - RESP3[31:0]\n
            [*] No response: RTS=00b
            [*] 136-bit: RTS=01b, Response field R[127:8] - {RESP3[23:0], RESP2[31:0], RESP1[31:0], RESP0[31:0]}\n
            [*] 48-bit: RTS=10b, Response field R[39:8] - RESP0[31:0]\n
            [*] 48-bit with BUSY: RTS=11b, Response field R[39:8] - RESP0[31:0]\n
            [/list]

            Implementation note: Registers value are undefined after reset, and will be valid after response is received.
          
      
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____SRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808200 0x10808210

Size: 32

Offset: 0x10

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESP0

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESP0

RO 0x0

SRS04 Fields

Bit Name Description Access Reset
31:0 RESP0
RESP0 - Response Register #0
RO 0x0