GITS0_OPSR

         GITS0_OPSR


Module Instance	Base Address	Register Address
`i_aps_gic__gic_axi4_slave__1d000000__GITS0`	`0x1D040000`	`0x1D040030`

Size: 64

Offset: 0x30

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
`REQUEST_COMPLETE` `RO 0x0`	`REQUEST_PASS` `RO 0x0`	`REQUEST_IN_PROGRESS` `RO 0x0`	`RESERVED2` `RO 0x0`												`ENTRY_LOCKED` `RO 0x0`
47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
`RESERVED1` `RO 0x0`			`TARGET` `RO 0x0`
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RESERVED0` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`PID` `RO 0x0`

GITS0_OPSR Fields


Bit	Name	Description	Access	Reset
63	`REQUEST_COMPLETE`	REQUEST_COMPLETE	`RO`	`0x0`
62	`REQUEST_PASS`	REQUEST_PASS	`RO`	`0x0`
61	`REQUEST_IN_PROGRESS`	REQUEST_IN_PROGRESS	`RO`	`0x0`
60:49	`RESERVED2`	RESERVED2	`RO`	`0x0`
48	`ENTRY_LOCKED`	ENTRY_LOCKED	`RO`	`0x0`
47:45	`RESERVED1`	RESERVED1	`RO`	`0x0`
44:32	`TARGET`	TARGET	`RO`	`0x0`
31:16	`RESERVED0`	RESERVED0	`RO`	`0x0`
15:0	`PID`	PID	`RO`	`0x0`