LSKIPFREQ 

         SKIP FREQUENCY REGISTER
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000 0x1100D000 0x1100D020

Size: 32

Offset: 0x20

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

u1_resid_timer_us

RW 0x4

en_pm_timer_us

RW 0x1

pm_lc_timer_us

RW 0x6

pm_entry_timer_us

RW 0x9

gen2_skp_freq

RW 0x28

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gen2_skp_freq

RW 0x28

gen1_skp_freq

RW 0x162

LSKIPFREQ Fields

Bit Name Description Access Reset
31 Reserved_1 
Reserved_1
 RO 0x0
30:28 u1_resid_timer_us 
Programmable U1 MIN RESIDENCY TIMER
  
  This field specifies U1 MIN RESIDENCY TIMER value in us. Set to 0 to disable the timer.
 RW 0x4
27 en_pm_timer_us 
Enable us PM timers
  
  This field enables the use of PM_LC_TIMER and PM_ENTRY_TIMER in us.
 RW 0x1
26:24 pm_lc_timer_us 
Programmable PM_LC_TIMER
  
  This field specifies PM_LC_TIMER value in us.
 RW 0x6
23:20 pm_entry_timer_us 
Programmable PM_ENTRY_TIMER
  
  This field specifies PM_ENTRY_TIMER value in us.
 RW 0x9
19:12 gen2_skp_freq 
gen2 SKP frequency
  
  This field specifies the average number of blocks the link sends before inserting a SKP OS.
 RW 0x28
11:0 gen1_skp_freq 
gen1 SKP frequency
  
  This field specifies the average number of symbols the link sends before inserting a SKP OS.
 RW 0x162