enable_set 

         Sets Master Region Enable field when written with 1
Module Instance Base Address Register Address
soc_mpfe_fw_tbu2noc_inst_0__fw_ddr_fpga2sdram__18000c00__ddr_scr__DDR_SCR 0x18000C00 0x18000C04

Size: 32

Offset: 0x4

Access: WO

Access mode: SECURE | PRIVILEGEMODE

Note: The processor must make a secure, privileged bus access to this register. You can configure processor mode settings in the control registers of the ARM Cortex-A53 MPcore processor. For more information about processor modes, please refer to the ARM Infocenter.

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_8

WO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_8

WO 0x0

region7enable

RW 0x0

region6enable

RW 0x0

region5enable

RW 0x0

region4enable

RW 0x0

region3enable

RW 0x0

region2enable

RW 0x0

region1enable

RW 0x0

region0enable

RW 0x0

enable_set Fields

Bit Name Description Access Reset
31:8 Reserved_8 
Reserved bitfield added by Magillem
 WO 0x0
7 region7enable 
Region 7 Enable Set.
Writing zero has no effect
Writing one will set the region7enable bit to one
 RW 0x0
6 region6enable 
Region 6 Enable Set.
Writing zero has no effect
Writing one will set the region6enable bit to one
 RW 0x0
5 region5enable 
Region 5 Enable Set.
Writing zero has no effect
Writing one will set the region5enable bit to one
 RW 0x0
4 region4enable 
Region 4 Enable Set.
Writing zero has no effect
Writing one will set the region4enable bit to one
 RW 0x0
3 region3enable 
Region 3 Enable Set.
Writing zero has no effect
Writing one will set the region3enable bit to one
 RW 0x0
2 region2enable 
Region 2 Enable Set.
Writing zero has no effect
Writing one will set the region2enable bit to one
 RW 0x0
1 region1enable 
Region 1 Enable Set.
Writing zero has no effect
Writing one will set the region1enable bit to one
 RW 0x0
0 region0enable 
Region 0 Enable Set.
Writing zero has no effect
Writing one will set the region0enable bit to one
 RW 0x0