ECC_Addrbus

         MSB bit of address is determined by ADR.
      
Module Instance Base Address Register Address
ecc_usb1_rx__ecc_csr__108c4400__ecc_registerBlock__SEG_L4_ECC_usb1_rxecc_0x0_0x400 0x108C4400 0x108C4440 - 0x108C44B0

Size: 32

Offset: 0x40

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

ECC_AddrBUS

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ECC_AddrBUS

RW 0x0

ECC_Addrbus Fields

Bit Name Description Access Reset
31 Reserved_1
Reserved bitfield added by Magillem
RO 0x0
30:0 ECC_AddrBUS
Address will be driven to RAM to either read or write the data. Address will be latched by the RAM when the Enbus is asserted.
RW 0x0