mpfe_config

         MPFE Interface Select
      
Module Instance Base Address Register Address
i_sys_mgr__sysmgr_csr__10d12000__core__SEG_L4_SHR_SystemManager_0x0_0x1000 0x10D12000 0x10D12228

Size: 32

Offset: 0x228

Access: RW

Access mode: PRIVILEGEMODE | SECURE

Note: The processor must make a secure, privileged bus access to this register. You can configure processor mode settings in the control registers of the ARM Cortex-A53 MPcore processor. For more information about processor modes, please refer to the ARM Infocenter.

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_10

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

mpfe_config_spare

RW 0x0

mpfe_lite_active

RW 0x0

mpfe_f2sdram_active

RW 0x0

mpfe_f2soc_active

RW 0x0

mpfe_io96b_csr_clk_enable

RW 0x1

mpfe_io96b_p1_clk_enable

RW 0x1

mpfe_io96b_p0_clk_enable

RW 0x1

mpfe_lite_intfcsel

RW 0x0

f2sdram_intfcsel

RW 0x0

f2soc_intfcsel

RW 0x0

mpfe_config Fields

Bit Name Description Access Reset
31:16 Reserved_10
Reserved bitfield added by Magillem
RO 0x0
15:9 mpfe_config_spare
The spare MPFE - HPS spare ports and registers are implemented as a contingency in the event MPFE-Fabric-IO96-HMC issues arise that need management by HPS or SDM firmware.
RW 0x0
8 mpfe_lite_active
0 = mpfe_lite active
1 = mpfe_lite not active
RW 0x0
7 mpfe_f2sdram_active
0 = mpfe_f2sdram active
1 = mpfe_f2sdram not active
RW 0x0
6 mpfe_f2soc_active
0 =mpfe_f2soc not active
1 = mpfe_f2soc active
RW 0x0
5 mpfe_io96b_csr_clk_enable
mpfe_io96b_csr_clk_enable
1: enabled
0: not enabled
RW 0x1
4 mpfe_io96b_p1_clk_enable
mpfe_io96b_p1_clk_enable
1: enabled
0: not enabled
RW 0x1
3 mpfe_io96b_p0_clk_enable
mpfe_io96b_p0_clk_enable
1: enabled
0- not enabled
RW 0x1
2 mpfe_lite_intfcsel
0 = don't select mpfe_lite
1 = select mpfe_lite
RW 0x0
1 f2sdram_intfcsel
0 = don't select f2dram
1 = select f2sdram
RW 0x0
0 f2soc_intfcsel
0 = don't select f2soc
1 = select f2soc
RW 0x0