i3c_slv_pid_high
Module Instance Base Address Register Address
i_sys_mgr__sysmgr_csr__10d12000__core__SEG_L4_SHR_SystemManager_0x0_0x1000 0x10D12000 0x10D12140

Size: 32

Offset: 0x140

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Val

RW 0x0

i3c_slv_pid_high Fields

Bit Name Description Access Reset
31:16 Reserved_1 
Reserved bitfield added by Magillem
 RO 0x0
15:0 Val 

                     		
                     
                        RW
                     
                     
                        0x0