TCU_NODE_CTRL4

         TCU_NODE_CTRL4


Module Instance	Base Address	Register Address
`i_aps_smmu__sys_tcu_apb__16000000__tcu__SEG_TCU_s_0x0_0x1000000`	`0x16000000`	`0x16009010`

Size: 32

Offset: 0x9010

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved_31_5` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved_31_5` `RO 0x0`											`DIS_DVM` `RW 0x0`	`Reserved_3_2` `RO 0x0`		`PRI_LEVEL` `RW 0x0`

TCU_NODE_CTRL4 Fields


Bit	Name	Description	Access	Reset
31:5	`Reserved_31_5`	Reserved_31_5	`RO`	`0x0`
4	`DIS_DVM`	Disable DVM. When this bit is set to 1, the corresponding node does not participate in DVM invalidation. Set this bit to 1 to improve performance if the node is slow to respond to invalidations issued over DTI.	`RW`	`0x0`
3:2	`Reserved_3_2`	Reserved_3_2	`RO`	`0x0`
1:0	`PRI_LEVEL`	Priority level. This field indicates the priority level of the corresponding node. Translation requests from a node with a higher priority level are normally progressed before those from a node with a lower priority level.	`RW`	`0x0`