SMMU_PMCG_PMDEVARCH

         SMMU_PMCG_PMDEVARCH
      
Module Instance Base Address Register Address
i_aps_smmu__sys_tcu_apb__16000000__tcu__SEG_TCU_s_0x0_0x1000000 0x16000000 0x16002FBC

Size: 32

Offset: 0x2FBC

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ARCHITECT

RO 0x23B

PRESENT

RO 0x1

REVISION

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ARCHID

RO 0x2A56

SMMU_PMCG_PMDEVARCH Fields

Bit Name Description Access Reset
31:21 ARCHITECT
ARCHITECT
RO 0x23B
20 PRESENT
PRESENT
RO 0x1
19:16 REVISION
REVISION
RO 0x0
15:0 ARCHID
ARCHID
RO 0x2A56