sdma_addr1

         
            This register stores the buffer address in the host memory that is used as a sink/source for the SDMA transfer.
            The SDMA address is based on the Memory Pointer field that was programed by the host as part of the CDMA/PIO command.
            A single CDMA/PIO command can trigger multiple transfers on the slave interface, so the SDMA address value is automatically incremented and updated before
            each SDMA transfer.


Module Instance	Base Address	Register Address
`i_nand__reg_apb__10b80000__rf_ctrl_config__SEG_L4_MP_nand_s_0x0_0x10000`	`0x10B80400`	`0x10B80450`

Size: 32

Offset: 0x50

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`sdma_addr_h` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`sdma_addr_h` `RO 0x0`

sdma_addr1 Fields


Bit	Name	Description	Access	Reset
31:0	`sdma_addr_h`	The SDMA destination/source address - higher part.	`RO`	`0x0`