dma_settings 

         DMA settings register. It is common register for both Master and Slave interface.
Module Instance Base Address Register Address
i_nand__reg_apb__10b80000__rf_ctrl_config__SEG_L4_MP_nand_s_0x0_0x10000 0x10B80400 0x10B8043C

Size: 32

Offset: 0x3C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_3

RO 0x0

sdma_err_rsp

RW 0x0

OTE

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

burst_sel

RW 0x0

dma_settings Fields

Bit Name Description Access Reset
31:18 Reserved_3 
Reserved bitfield added by Magillem
 RO 0x0
17 sdma_err_rsp 
If this bit is set then ERROR response
            is returned if host tries to access unprepared Slave DMA
            interface. If this bit is cleared the OK response is
            returned.
 RW 0x0
16 OTE 
Outstanding transaction enable. It only applies to the master interface, the slave interface will ignore this bit and will accept all incoming transactions.
 RW 0x0
15:8 Reserved_1 
Reserved bitfield added by Magillem
 RO 0x0
7:0 burst_sel 
Sets the burst used by data DMA for transferring data to/from flash device. The maximum burst size can be calculated as burst_sel+1. This field should be changed only if controller is in IDLE state
 RW 0x0