ECC_RDataecc1bus
The msb bit for the register is configured based on DAT parameter (RAM word size). Unimplemented bytes of this register will be reserved.
| Module Instance | Base Address | Register Address |
|---|---|---|
ecc_emac1_rx__ecc_csr__108c0800__ecc_registerBlock__SEG_L4_ECC_emac1rx_ecc_0x0_0x400
|
0x108C0800
|
0x108C0868 - 0x108C0950
|
Size: 32
Offset: 0x68
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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ECC_RDataecc1bus Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:24 |
ECC_RDataecc7BUS
|
Eccdata will be read to this register field. |
RO
|
0x0
|
| 23:16 |
ECC_RDataecc6BUS
|
Eccdata will be read to this register field. |
RO
|
0x0
|
| 15:8 |
ECC_RDataecc5BUS
|
Eccdata will be read to this register field. |
RO
|
0x0
|
| 7:0 |
ECC_RDataecc4BUS
|
Eccdata will be read to this register field. |
RO
|
0x0
|