DVECESR
DVE Correctable Error Status Register
Module Instance | Base Address | Register Address |
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i_ccu__DSU__1c000000__dve0
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0x1C00E000
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0x1C00E108
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Size: 32
Offset: 0x108
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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DVECESR Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:16 |
ErrInfo
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This field indicates additional information about logged error type, if the Correctable Error Valid bit is set. If it is a Memory correctable error then bits 1:0 2'b11 represent snoop filter (2'b00, 2'b01 and 2'b10: reserved) bits 7:2 Reserved bits 15:8 Represents the snoop filter number |
RO
|
0x0
|
15:12 |
ErrType
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This field indicates the logged error type, if the Correctable Error Valid bit is set. 0x00: Data SRAM correctable error 0x01: Cache SRAM correctable error All other encodings are reserved |
RO
|
0x0
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11:10 |
Rsvd1
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Reserved |
RO
|
0x0
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9:2 |
ErrCount
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This field indicates the number of correctable errors detected by the unit. The field stops incrementing if the Correctable Error Count Overflow bit is set |
RO
|
0x0
|
1 |
ErrCountOverflow
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This bit indicates that the number of correctable errors detected by the unit overflowed the Correctable Error Count field |
RO
|
0x0
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0 |
ErrVld
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If this bit is set, Error information is logged in status and location registers. Writing a one to the Correctable Error Valid bit clears the Correctable Error Valid bit. |
RW
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0x0
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