SRS31 

         
            SRS30 ADMA3 ID Address 2
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____SRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808200 0x1080827C

Size: 32

Offset: 0x7C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ADMA3ID2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ADMA3ID2

RW 0x0

SRS31 Fields

Bit Name Description Access Reset
31:0 ADMA3ID2 
              ADMA3 Integrated Descriptor Address #2\n
              If 64-bit addressing is enabled (SRS15.A64B=1), this field holds bits 63-32 of the physical address pointing on ADMA3 Integrated Descriptor table.\n
              \n
              When ADMA3 uses 64-bit addressing mode, write to this register starts ADMA3.
RW 0x0