SRS26
SRS26 - Preset Value (SDR25 and SDR50)\n
SRS26[15:0] - SDR25 if:\n
SRS15.V18SE=1\n
SRS15.UMS=001b\n
SRS26[31:16] - SDR50 if:\n
SRS15.V18SE=1\n
SRS15.UMS=010b\n
HWINIT Register - Note this register is hardware initialized after reset and the value read back will match the IP configuration.
Module Instance | Base Address | Register Address |
---|---|---|
i_sdmmc__sdmmc_apb_slv__10808000____SRS____SEG_L4_MP_sdmmc_s_0x0_0x1000
|
0x10808200
|
0x10808268
|
Size: 32
Offset: 0x68
Access: RO
Bit Fields | |||||||||||||||
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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SRS26 Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:30 |
SRS26_DSSPV_31_30
|
DSSPV## - Driver Strength Select - Preset Value\n This field can be used by the software to update SRS15.DSS. |
RO
|
0x0
|
29:26 |
Reserved_4
|
Reserved bitfield added by Magillem |
RO
|
0x0
|
25:16 |
SRS26_SDCFSPV_25_16
|
SDCFSPV## - SDCLK Clock Frequency Select - Preset Value\n This field can be used by the software to update SRS11.SDCFSH and SRS11.SDCFSL. |
RO
|
0x1
|
15:14 |
SRS26_DSSPV_15_14
|
DSSPV## - Driver Strength Select - Preset Value\n This field can be used by the software to update SRS15.DSS. |
RO
|
0x0
|
13:11 |
Reserved_2
|
Reserved bitfield added by Magillem |
RO
|
0x0
|
10 |
SRS26_CGSPV_10
|
CGSPV## - Clock Generator Select - Preset Value\n This field can be used by the software to update SRS11.CGS. |
RO
|
0x0
|
9:0 |
SRS26_SDCFSPV_09_00
|
SDCFSPV## - SDCLK Clock Frequency Select - Preset Value\n This field can be used by the software to update SRS11.SDCFSH and SRS11.SDCFSL. |
RO
|
0x2
|