SRS22 

         SRS22  ADMA/SDMA System Address 1
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____SRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808200 0x10808258

Size: 32

Offset: 0x58

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

DMASA1

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

DMASA1

RW 0x0

SRS22 Fields

Bit Name Description Access Reset
31:0 DMASA1 
              DMASA1 - ADMA System Address\n
              This field contains the physical address of the currently processed ADMA descriptor or SDMA system address.
              The Host Driver will set this register with the descriptors table base address before it starts the ADMA transfers.
              The Host Driver should not write this register while the data transfer is active.\n
              While the ADMA engine is processing the descriptors list, the ADMASA value is always incremented to point the next descriptor to be fetched.\n
              If the ADMA Error occurs, the register holds the descriptor address depending on the ADMA Error State (SRS21.EADMAS) register value, as listed in the table below:\n
              00b - Points next of the error descriptor\n
              01b - Points the error descriptor\n
              10b - not used\n
              11b - Points next of the error descriptor\n

              The host ADMA engine ignores 2 or 3 least significant bits in this register when the 32-bit or 64-bit addressing is active, respectively.\n
              If SRS15.HV4E is set 1 and SDMA engine is selected, this field is used instead of SRS00 to define system memory address.
              This register incremented and points to the next memory location that will be accessed.
RW 0x0