UHS_REG_EXT 

         
Name: UHS Register Extention
Size: 32 bits
Address Offset: 0x108
Read/Write access: read/write
Module Instance Base Address Register Address
i_sdmmc__sdmmc_csr__108d1000__sdmmc_block__SEG_hps2sdm_be_0x1000_0x1000 0x108D1000 0x108D1108

Size: 32

Offset: 0x108

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

EXT_CLK_MUX_CTRL

RW 0x0

CLK_DRV_PHASE_CTRL

RW 0x0

CLK_SMPL_PHASE_CTRL

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

MMC_VOLT_REG_15

RW 0x0

MMC_VOLT_REG_14

RW 0x0

MMC_VOLT_REG_13

RW 0x0

MMC_VOLT_REG_12

RW 0x0

MMC_VOLT_REG_11

RW 0x0

MMC_VOLT_REG_10

RW 0x0

MMC_VOLT_REG_9

RW 0x0

MMC_VOLT_REG_8

RW 0x0

MMC_VOLT_REG_7

RW 0x0

MMC_VOLT_REG_6

RW 0x0

MMC_VOLT_REG_5

RW 0x0

MMC_VOLT_REG_4

RW 0x0

MMC_VOLT_REG_3

RW 0x0

MMC_VOLT_REG_2

RW 0x0

MMC_VOLT_REG_1

RW 0x0

MMC_VOLT_REG_0

RW 0x0

UHS_REG_EXT Fields

Bit Name Description Access Reset
31:30 EXT_CLK_MUX_CTRL 
Input clock control for cclk_in. The MUX controlled by these bits exists outside DWC_mobile_storage IP.
 RW 0x0
29:23 CLK_DRV_PHASE_CTRL 
Control for amount of phase shift on cclk_in_drv clock. Can choose three MSBs to control delay lines and four LSBs to control phase shift; alternatively, use only LSBs.
 RW 0x0
22:16 CLK_SMPL_PHASE_CTRL 
Control for amount of phase shift on cclk_in_sample clock. Can choose three MSBs to control delay lines and four LSBs to control phase shift; alternatively, use only LSBs.
 RW 0x0
15 MMC_VOLT_REG_15 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
14 MMC_VOLT_REG_14 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
13 MMC_VOLT_REG_13 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
12 MMC_VOLT_REG_12 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
11 MMC_VOLT_REG_11 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
10 MMC_VOLT_REG_10 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
9 MMC_VOLT_REG_9 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
8 MMC_VOLT_REG_8 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
7 MMC_VOLT_REG_7 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
6 MMC_VOLT_REG_6 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
5 MMC_VOLT_REG_5 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
4 MMC_VOLT_REG_4 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
3 MMC_VOLT_REG_3 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
2 MMC_VOLT_REG_2 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
1 MMC_VOLT_REG_1 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0
0 MMC_VOLT_REG_0 
Support for 1.2V. MMC_VOLT_REG bits; must be read in combination 
with UHS_VOLT_REG to decode output selected voltage.
The biu_volt_reg_1_2[NUM_CARD_BUS-1:0] signal decodes the voltage combination selected for the I/O voltage logic.
Host controllers that support only SD standard or standard versions before eMMC4.41 do not program MMC_VOLT_REG. 
Only host controllers that support all three versions3.3,1.8,1.2 Vcan program MMC_VOLT_REG and connect biu_volt_reg_1_2.
Value Description
0x0 1.2V not supported
0x1 Support for 1.2V
RW 0x0