RST_n
Name: H/W Reset
Size: 32 bits
Address Offset: 0x78
Read/write access: write/read
| Module Instance | Base Address | Register Address |
|---|---|---|
i_sdmmc__sdmmc_csr__108d1000__sdmmc_block__SEG_hps2sdm_be_0x1000_0x1000
|
0x108D1000
|
0x108D1078
|
Size: 32
Offset: 0x78
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
|
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
|
|
||||||||||||||
RST_n Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31:1 |
Reserved_1
|
Reserved bitfield added by Magillem |
RO
|
0x0
|
||||||
| 0 |
CARD0_RESET
|
Hardware reset.
1 Active mode
0 Reset
These bits cause the cards to enter pre-idle state, which requires them to be re-initialized.
■ CARD_RESET[0] should be set to 1’b0 to reset card number 0
■ CARD_RESET[15] should be set to 1'b0 to reset card number 15.
The number of bits implemented is restricted to NUM_CARDS.
|
RW
|
0x1
|