GPIO 

         
Name: General Purpose Input/Output Register
Size: 32 bits
Address Offset: 0x58
Read/write access: Partly write/read and partly read-only
Module Instance Base Address Register Address
i_sdmmc__sdmmc_csr__108d1000__sdmmc_block__SEG_hps2sdm_be_0x1000_0x1000 0x108D1000 0x108D1058

Size: 32

Offset: 0x58

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_2

RO 0x0

GPO

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

GPO

RW 0x0

GPI

RO 0x0

GPIO Fields

Bit Name Description Access Reset
31:24 Reserved_2 
Reserved bitfield added by Magillem
 RO 0x0
23:8 GPO 
Value needed to be driven to gpo pins; this portion of register is read/write. Valid only when AREA_OPTIMIZED parameter is 0.
 RW 0x0
7:0 GPI 
Value on gpi input ports; this portion of register is read-only. Valid only when AREA_OPTIMIZED parameter is 0.
 RO 0x0