GICR1_WAKER

         GICR1_WAKER


Module Instance	Base Address	Register Address
`i_aps_gic__gic_axi4_slave__1d000000__GICRlpi1`	`0x1D080000`	`0x1D080014`

Size: 32

Offset: 0x14

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Quiescent` `RO 0x0`	`RESERVED0` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`RESERVED0` `RO 0x0`													`ChildrenAsleep` `RO 0x1`	`ProcessorSleep` `RW 0x1`	`Sleep` `RW 0x0`

GICR1_WAKER Fields


Bit	Name	Description	Access	Reset
31	`Quiescent`	Quiescent	`RO`	`0x0`
30:3	`RESERVED0`	RESERVED0	`RO`	`0x0`
2	`ChildrenAsleep`	ChildrenAsleep	`RO`	`0x1`
1	`ProcessorSleep`	ProcessorSleep	`RW`	`0x1`
0	`Sleep`	Sleep	`RW`	`0x0`