ECC_RDataecc0bus

         The msb bit for the register is configured based on DAT parameter (RAM word size). Unimplemented bytes of this register will be reserved.
      
Module Instance Base Address Register Address
ecc_qspi__ecc_csr__10a22000__ecc_registerBlock__SEG_hps2sdm_be_0x220000_0x10000 0x10A22000 0x10A22064 - 0x10A2214C

Size: 32

Offset: 0x64

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ECC_RDataecc3BUS

RO 0x0

ECC_RDataecc2BUS

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ECC_RDataecc1BUS

RO 0x0

ECC_RDataecc0BUS

RO 0x0

ECC_RDataecc0bus Fields

Bit Name Description Access Reset
31:24 ECC_RDataecc3BUS
Eccdata will be read to this register field.
RO 0x0
23:16 ECC_RDataecc2BUS
Eccdata will be read to this register field.
RO 0x0
15:8 ECC_RDataecc1BUS
Eccdata will be read to this register field.
RO 0x0
7:0 ECC_RDataecc0BUS
Eccdata will be read to this register field.
RO 0x0