DIIUUESAR

         DIIU Uncorrectable Error Status Alias Register


Module Instance	Base Address	Register Address
`i_ccu__DSU__1c000000__OCRAM`	`0x1C00C000`	`0x1C00C12C`

Size: 32

Offset: 0x12C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`ErrInfo` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Rsvd2` `RO 0x0`								`ErrType` `RW 0x0`				`Rsvd1` `RO 0x0`			`ErrVld` `RW 0x0`

DIIUUESAR Fields


Bit	Name	Description	Access	Reset
31:16	`ErrInfo`	Alias bit for setting errro info field of xUESR	`RW`	`0x0`
15:8	`Rsvd2`	Reserved	`RO`	`0x0`
7:4	`ErrType`	Alias bit for setting error type field of xUESR	`RW`	`0x0`
3:1	`Rsvd1`	Reserved	`RO`	`0x0`
0	`ErrVld`	Alias bit for setting error valid filed of xUESR	`RW`	`0x0`