GPIO_INT_POLARITY

         Name: Interrupt polarity
Size: 1-32 bits
Address Offset: 0x3c
Read/Write Access: Read/Write


Module Instance	Base Address	Register Address
`i_gpio_1__gpio_csr__10c03300__DW_apb_gpio_addr_block__SEG_L4_SP_gpio1_0x0_0x100`	`0x10C03300`	`0x10C0333C`

Size: 32

Offset: 0x3C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved_1` `RO 0x0`								`GPIO_INT_POLARITY` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`GPIO_INT_POLARITY` `RW 0x0`

GPIO_INT_POLARITY Fields

Bit Name Description Access Reset

31:24

Reserved_1

Reserved bitfield added by Magillem

RO

0x0

23:0

GPIO_INT_POLARITY

Controls the polarity of edge or level sensitivity that can
occur on input of Port A. Whenever a 0 is written to a bit of
this register, it configures the interrupt type to falling-edge or
active-low sensitive; otherwise, it is rising-edge or
active-high sensitive.
0  Active-low (default)
1  Active-high

Value	Description
0x0	Active Low polarity
0x1	Active High polarity

RW

0x0