DIICNTSR0

         PMON Counter Saturation Register


Module Instance	Base Address	Register Address
`i_ccu__DSU__1c000000__GIC_CSR`	`0x1C00B000`	`0x1C00BB08`

Size: 32

Offset: 0xB08

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`CountSatVal` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`CountSatVal` `RW 0x0`

DIICNTSR0 Fields


Bit	Name	Description	Access	Reset
31:0	`CountSatVal`	Either upper counter value 63:32 or LPF bits	`RW`	`0x0`