GICT_PIDR3

         GICT_PIDR3
      
Module Instance Base Address Register Address
i_aps_gic__gic_axi4_slave__1d000000__GICT 0x1D020000 0x1D02FFEC

Size: 32

Offset: 0xFFEC

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED1

RO 0x0

REVAND

RO 0x0

RESERVED0

RO 0x0

CMOD

RO 0x0

GICT_PIDR3 Fields

Bit Name Description Access Reset
31:8 RESERVED1
RESERVED1
RO 0x0
7:4 REVAND
REVAND
RO 0x0
3 RESERVED0
RESERVED0
RO 0x0
2:0 CMOD
CMOD
RO 0x0