GICP_SVR0

         GICP_SVR0
      
Module Instance Base Address Register Address
i_aps_gic__gic_axi4_slave__1d000000__GICP 0x1D030000 0x1D030600

Size: 32

Offset: 0x600

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

COUNT

RO 0x0

GICP_SVR0 Fields

Bit Name Description Access Reset
31:0 COUNT
COUNT
RO 0x0