GICD_NSACR10

         GICD_NSACR10
      
Module Instance Base Address Register Address
i_aps_gic__gic_axi4_slave__1d000000__GICD 0x1D000000 0x1D000E28

Size: 32

Offset: 0xE28

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ns_access15

RW 0x0

ns_access14

RW 0x0

ns_access13

RW 0x0

ns_access12

RW 0x0

ns_access11

RW 0x0

ns_access10

RW 0x0

ns_access9

RW 0x0

ns_access8

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ns_access7

RW 0x0

ns_access6

RW 0x0

ns_access5

RW 0x0

ns_access4

RW 0x0

ns_access3

RW 0x0

ns_access2

RW 0x0

ns_access1

RW 0x0

ns_access0

RW 0x0

GICD_NSACR10 Fields

Bit Name Description Access Reset
31:30 ns_access15
ns_access15
RW 0x0
29:28 ns_access14
ns_access14
RW 0x0
27:26 ns_access13
ns_access13
RW 0x0
25:24 ns_access12
ns_access12
RW 0x0
23:22 ns_access11
ns_access11
RW 0x0
21:20 ns_access10
ns_access10
RW 0x0
19:18 ns_access9
ns_access9
RW 0x0
17:16 ns_access8
ns_access8
RW 0x0
15:14 ns_access7
ns_access7
RW 0x0
13:12 ns_access6
ns_access6
RW 0x0
11:10 ns_access5
ns_access5
RW 0x0
9:8 ns_access4
ns_access4
RW 0x0
7:6 ns_access3
ns_access3
RW 0x0
5:4 ns_access2
ns_access2
RW 0x0
3:2 ns_access1
ns_access1
RW 0x0
1:0 ns_access0
ns_access0
RW 0x0