GICD_IPRIORITYR126

         GICD_IPRIORITYR126


Module Instance	Base Address	Register Address
`i_aps_gic__gic_axi4_slave__1d000000__GICD`	`0x1D000000`	`0x1D0005F8`

Size: 32

Offset: 0x5F8

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`offset3` `RW 0x0`								`offset2` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`offset1` `RW 0x0`								`offset0` `RW 0x0`

GICD_IPRIORITYR126 Fields


Bit	Name	Description	Access	Reset
31:24	`offset3`	offset3	`RW`	`0x0`
23:16	`offset2`	offset2	`RW`	`0x0`
15:8	`offset1`	offset1	`RW`	`0x0`
7:0	`offset0`	offset0	`RW`	`0x0`