LU1LFPSRXTIM 

         U1_LFPS_RX_TIMER_REG
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000 0x1100D000 0x1100D000

Size: 32

Offset: 0x

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

gen2_u1_lfps_exit_rx_clk

RW 0x30

gen2_u1_exit_rsp_rx_clk

RW 0x30

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gen1_u1_lfps_exit_rx_clk

RW 0x26

gen1_u1_exit_rsp_rx_clk

RW 0x26

LU1LFPSRXTIM Fields

Bit Name Description Access Reset
31:24 gen2_u1_lfps_exit_rx_clk 
gen2 U1_LFPS_EXIT_RX_CLKS
   - Time to recognize Ux exit request from the remote partner.
   - This field is encoded as the Gen2 link_clk (6.4ns) count for the LFPS.
   -- 1: 6.4ns
   -- 2: 12.8ns
   -- 3: 19.2ns, and so on
 RW 0x30
23:16 gen2_u1_exit_rsp_rx_clk 
gen2 U1_EXIT_RESP_RX_CLKS
   - Locally initiated Ux exit: Minimum LFPS reception from remote to consider Ux exit handshake successful.
   - This field is encoded as the Gen2 link_clk (6.4ns) count for the LFPS.
   -- 1: 6.4ns
   -- 2: 12.8ns
   -- 3: 19.2ns, and so on
 RW 0x30
15:8 gen1_u1_lfps_exit_rx_clk 
gen1 U1_LFPS_EXIT_RX_CLKS
   - Time to recognize Ux exit request from remote partner.
   - This field is encoded as the Gen1 link_clk (8ns) count for the LFPS.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0x26
7:0 gen1_u1_exit_rsp_rx_clk 
gen1 U1_EXIT_RESP_RX_CLKS
   - Locally initiated Ux exit: Minimum LFPS reception from remote to consider Ux exit handshake  successful.
   - This field is encoded as the Gen1 link_clk (8ns) count for the LFPS.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0x26