LSCDTIM4
SCD TIMER4 REGISTER
| Module Instance | Base Address | Register Address |
|---|---|---|
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000
|
0x1100D000
|
0x1100D038
|
Size: 32
Offset: 0x38
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
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| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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LSCDTIM4 Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:12 |
Reserved_1
|
Reserved_1 |
RO
|
0x0
|
| 11:0 |
lfps_scd_last_space
|
LFPS_SCD_LAST_SPACE_CLKS - Duration of the last space for each SCD - This field is encoded as the Gen1 link_clk (8ns) count. -- 1: 8ns -- 2: 16ns -- 3: 24ns, and so on |
RW
|
0xEA6
|