LSCDTIM3

         SCD TIMER3 REGISTER
      
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000 0x1100D000 0x1100D034

Size: 32

Offset: 0x34

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

lfps_scd_space1_clk

RW 0x5DC

lfps_scd_space0_clk

RW 0x2F0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

lfps_scd_space0_clk

RW 0x2F0

lfps_scd_burst_clk

RW 0x7D

LSCDTIM3 Fields

Bit Name Description Access Reset
31:20 lfps_scd_space1_clk RW 0x5DC
19:8 lfps_scd_space0_clk RW 0x2F0
7:0 lfps_scd_burst_clk RW 0x7D