LPOLLLFPSTXTIM 

         POLL LFPS TX TIMER REGISTER
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000 0x1100D000 0x1100D01C

Size: 32

Offset: 0x1C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

reserved_31_22

RO 0x0

lfps_poll_space_clk

RW 0x465

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

lfps_poll_space_clk

RW 0x465

lfps_poll_burst_clk

RW 0x7D

LPOLLLFPSTXTIM Fields

Bit Name Description Access Reset
31:22 reserved_31_22 
reserved_31_22
 RO 0x0
21:11 lfps_poll_space_clk 
LFPS_POLL_SPACE_CLKS: space between Polling.LFPS
  
  This field is encoded as the Gen1 link_clk (8ns) count for the LFPS.
   - 1: 8ns
   - 2: 16ns
   - 3: 24ns, and so on
 RW 0x465
10:0 lfps_poll_burst_clk 
LFPS_POLL_BURST_CLKS:  TX Polling.LFPS tBurst
  
  This field is encoded as the Gen1 link_clk (8ns) count for the LFPS.
   - 1: 8ns
   - 2: 16ns
   - 3: 24ns, and so on
 RW 0x7D