LLPBMTIM1 

         LPBM TIMER1 REGISTER
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_link__SEG_L4_AHB_USB1_0x0_0x100000 0x1100D000 0x1100D03C

Size: 32

Offset: 0x3C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

lfps_lbps1_burst_max_clk

RW 0xF0

lfps_lbps1_burst_min_clk

RW 0x96

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

lfps_lbps0_burst_max_clk

RW 0x6B

lfps_lbps0_burst_min_clk

RW 0x32

LLPBMTIM1 Fields

Bit Name Description Access Reset
31:24 lfps_lbps1_burst_max_clk 
LFPS_LBPS1_BURST_MAX_CLKS
   - Max duration of LPBM bit 1, used in LPBM detection FSM
   - This field is encoded as the Gen1 link_clk (8ns) count.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0xF0
23:16 lfps_lbps1_burst_min_clk 
LFPS_LBPS1_BURST_MIN_CLKS
   - Min duration of LPBM bit 1, used in LPBM detection FSM
   - This field is encoded as the Gen1 link_clk (8ns) count.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0x96
15:8 lfps_lbps0_burst_max_clk 
LFPS_LBPS0_BURST_MAX_CLKS
   - Max duration of LPBM bit 0, used in LPBM detection FSM
   - This field is encoded as the Gen1 link_clk (8ns) count.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0x6B
7:0 lfps_lbps0_burst_min_clk 
LFPS_LBPS0_BURST_MIN_CLKS
   - Min duration of LPBM bit 0, used in LPBM detection FSM
   - This field is encoded as the Gen1 link_clk (8ns) count.
   -- 1: 8ns
   -- 2: 16ns
   -- 3: 24ns, and so on
 RW 0x32