GUCTL

REFCLKPER
  
  This field indicates the period of ref_clk, in terms of nano seconds. 
  
  The valid programmable values of this field are as follows:
   - 'h19: 25ns (integer corresponding to the supported ref_clk frequencies of 39.7 MHz)
   - 'h29: 41ns (integer corresponding to the supported ref_clk frequency of 24 MHz)
   - 'h32: 50ns (integer corresponding to the supported ref_clk frequency of 20 MHz)
   - 'h34: 52ns (integer corresponding to the supported ref_clk frequency of 19.2MHz)
   - 'h3A: 58ns (integer corresponding to the supported ref_clk frequency of 17 MHz)
   - 'h3E: 62ns (integer corresponding to the supported ref_clk frequency of 16 MHz) 
  
  This field needs to be updated during power-on initialization.

No Extra Delay Between SOF and the First Packet(NoExtrDl)
  
  Some HS devices misbehave when the host sends a packet immediately after a SOF. However, adding an extra delay between a SOF and the first packet can reduce the USB data rate and performance. 
  
  This bit is used to control whether the host must wait for 2 microseconds before it sends the first packet after a SOF, or not. User can set this bit to one to improve the performance if those problematic devices are not a concern in the user's host environment.
   - 1'b0: Host waits for 2 microseconds after a SOF before it sends the first USB packet.
   - 1'b1: Host doesn't wait after a SOF before it sends the first USB packet.

DMA Ignore HCE
  

IgnoreHCETimeout
  

When set, the Extended TBC Capability is reported in HCCPARAMS2 if the DWC_USB31_EXTD_TBC_CAP_EN parameter is enabled.

Sparse Control Transaction Enable
  
  Some devices are slow in responding to Control transfers. Scheduling multiple transactions in one microframe/frame can cause these devices to misbehave.
  
  If this bit is set to 1'b1, the host controller schedules each phase of a Control transfer in different microframes/frames.
  

Reserving 85% Bandwidth for HS Periodic EPs (ResBwHSEPS)
   - 1'b0: HC reserves 80% of the bandwidth for periodic EPs. 
   - 1'b1: HC relaxes the bandwidth to 85% to accommodate two high-speed high-bandwidth ISOC EPs.
  USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two high-bandwidth ISOC devices (HD Webcams) are connected and each device requires 1024-bytes X 3 packets per micro-frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per micro-frame each. Otherwise, you may have to reduce the resolution of the Webcams.
  
  This bit is valid in Host mode operation only. This field is ignored for device mode.

Reserved

Host IN Immediate Retry (USBHstInImmRetryEn)
  
  When set, this field enables the Immediate Retry feature. For IN transfers (non-isochronous) that encounter data packets with CRC errors or internal overrun scenarios, the immediate retry feature causes the Host controller to reply to the device with a non-terminating retry ACK (that is, an ACK transaction packet with Retry = 1 and NumP != 0). 
  
  If the Immediate Retry feature is disabled, the controller will respond with a terminating retry ACK (that is, an ACK transaction packet with Retry = 1 and NumP = 0).
   - 1'b0: Immediate Retry Disabled 
   - 1'b1: Immediate Retry Enabled

Reserved

External Extended Capability Support Enable (ExtCapSuptEN)
  
  When set, this field enables extended capabilities to be implemented outside the controller. 
  
  When the ExtCapSupEN is set and the Debug Capability is enabled, the Next Capability pointer in "Debug Capability" returns 16.
  
  A read to the first DWORD of the last internal extended capability (the "xHCI Supported Protocol Capability for USB 3.1" when the Debug Capability is not enabled) returns a value of 4 in the Next Capability Pointer field. 
  
  This indicates to software that there is another capability four DWORDs after this capability (for example, at address N+16 where N is the address of this DWORD).
  If enabled, an external address decoder that snoops the xHC slave interface must be implemented.   If it sees an access to N+16 or greater, the slave access is re-routed to a piece of hardware which returns the external capability pointer register of the new capability and also handles reads/writes to this new capability and the side effects.
  
  If disabled, a read to the first DWORD of the last internal extended capability returns 0 in the 'Next Capability Pointer field. This indicates there are no more capabilities.
  

Insert Extra Delay Between FS Bulk OUT Transactions (InsrtExtrFSBODl).
  
  Some FS devices are slow to receive Bulk OUT data and can get stuck when there are consecutive Bulk OUT transactions with short inter-transaction delays. This bit is used to control whether the host inserts extra delay between consecutive Bulk OUT transactions to a FS Endpoint.
   - 1'b0: Host doesn't insert extra delay between consecutive Bulk OUT transactions to a FS Endpoint.
   - 1'b1: Host inserts about 12us extra delay between consecutive Bulk OUT transactions to a FS Endpoint to work around the device issue.
  Note: Setting this bit to one will reduce the Bulk OUT transfer performance for FS devices.
  

Device Timeout (DTOUT)
  This field is Host mode parameter which determines how long the host waits for response from Enhanced SuperSpeed Device before considering the transaction to be timeout. Each count indicates duration in terms of 125us.
  For example a value of 1 indicates timeout at the minimum of 125us and maximum of 250us. The maximum value that can be programmed is 200 which sets 25ms as timeout time (minimum is 25ms and maximum is 25.125ms).