GTXTHRCFG
Global Tx Threshold Control Register
Note:
- GTXTHRCFG register is not applicable for Debug Target.
- For more information on threshold settings, see the <link:ext>DWC_usb31_databook:rx_tx_threshold,"Rx and Tx Threshold Settings"</link> section in the Databook.
Module Instance | Base Address | Register Address |
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i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000
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0x1100C100
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0x1100C108
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Size: 32
Offset: 0x8
Access: RW
Bit Fields | |||||||||||||||
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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GTXTHRCFG Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:27 |
reserved_31_27
|
Reserved |
RW
|
0x0
|
26 |
UsbTxPktCntSel
|
USB Async ESS Transmit Packet Threshold Enable - Host/Device Modes This field enables/disables the USB transmission multi-packet thresholding for Async endpoints: - 0: USB transmission multi-packet thresholding is disabled; the controller starts transmission on the USB as soon as one packet has been fetched into the corresponding TXFIFO. - 1: USB transmission multi-packet thresholding is enabled. The controller can only start transmission on the USB after USB Transmit Packet Count amount of packets for the USB transaction (burst) are already in the corresponding TXFIFO. This mode is valid in both host and device mode. It is only used for Enhanced SuperSpeed. In device mode, the controller can send ERDY on the USB after USB Transmit Packet Count amount of packets for the USB transaction (burst) are already in the corresponding TXFIFO of a Bulk IN endpoint |
RW
|
0x0
|
25:21 |
UsbTxPktCnt
|
USB Async ESS Transmit Packet Threshold Count - Host/Device Modes This field specifies the number of packets that must be in the TXFIFO before the controller can start transmission for the corresponding USB transaction (burst) for Async endpoints. This field is only valid when the USB Async ESS Transmit Packet Threshold Enable field is set to one. For device mode, this field specifies the number of packets that must be in the TXFIFO before the controller can start transmission of ERDY for the corresponding USB transaction (burst) of Bulk IN endpoint. Valid values for this field is 1 to 16. Note: - In host mode, this field must be less than or equal to the USB Maximum TX Burst Size field. - In device mode, this field must be less than or equal to the USB endpoint maximum Burst Size amongst all endpoints. |
RW
|
0x7
|
20:16 |
UsbMaxTxBurstSize
|
USB Async ESS Maximum TX Burst Size - Host Mode Only When USBTxPktCntSel is 1, this field specifies the Maximum ESS Bulk OUT burst that the controller can execute. When the system bus is slower than the USB, TXFIFO can underrun during a long burst. You can program a smaller value to this field to limit the TX burst size that the controller can execute. It only applies to ESS Bulk OUT endpoints in the host mode. Valid values are from 1 to 16. Note: This field can only be set to 2, 4, 8 or 16. |
RW
|
0x10
|
15 |
UsbTxThrNumPktSel_HS_Prd
|
USB HS High Bandwidth Periodic Transmit Packet Threshold Enable - Host Mode Only This field enables/disables the USB HS High Bandwidth Periodic transmission multi-packet thresholding> - 0: USB HS High Bandwidth Periodic transmission multi-packet thresholding is disabled; the controller can start transmission on the USB as soon as one packet has been fetched into the corresponding TXFIFO. - 1: USB HS High Bandwidth Periodic transmission multi-packet thresholding is enabled. The controller can start transmission on the USB only after USB HS High Bandwidth Periodic Transmit Packet Threshold Count number of packets for the Periodic High Bandwidth USB transaction is already in the corresponding TXFIFO. This mode is valid in host mode for high speed high bandwidth periodic endpoints. Note: The intent of using this bit is only when the system bus is slow and not able to cater to the data rate of High-Bandwidth endpoint (3076 bytes/uframe). If the system bus is slow, and if all the transactions of a High-Bandwidth endpoint could not be executed successfully, it would likely cause a compliance test failure (section 5.4.x of xHCI Compliance Test Specification). This issue is seen only with older PCI based USB-IF compliance devices. |
RW
|
0x0
|
14:13 |
UsbTxThrNumPkt_HS_Prd
|
USB HS High Bandwidth Periodic Transmit Packet Threshold Count - Host Mode Only This field specifies the number of packets that must be available in the TXFIFO before the controller can start transmission for the Periodic High Bandwidth USB transaction. This field is only valid when the USB HS High Bandwidth Periodic Transmit Packet Threshold Enable field is set to one. Valid values are from 1 to 3. |
RW
|
0x0
|
12:11 |
reserved_12_11
|
Reserved |
RW
|
0x0
|
10 |
UsbTxThrNumPktSel_Prd
|
USB Periodic ESS Transmit Packet Threshold Enable - Host Mode Only This field enables/disables the USB Periodic transmission multi-packet thresholding: - 0: USB transmission multi-packet thresholding is disabled; the controller starts transmission on the USB as soon as one packet has been fetched into the corresponding TXFIFO. - 1: USB transmission multi-packet thresholding is enabled. The controller can start transmission on the USB only after USB Periodic ESS Transmit Packet Threshold Count amount of packets for the USB transaction (burst) has been fetched into the corresponding TXFIFO. It is used only for ESS. |
RW
|
0x0
|
9:5 |
UsbTxThrNumPkt_Prd
|
USB Periodic ESS Transmit Packet Threshold Count - Host Mode Only This field specifies the number of packets that must be in the TXFIFO before the controller can start transmission for the corresponding USB transaction (burst). This field is valid only when the USB Periodic ESS Transmit Packet Threshold Enable field (UsbTxThrNumPktSel_Prd) is set to one. Valid values are from 1 to 16. Note: This field must be less than or equal to the USB Maximum Periodic TX Burst Size field. |
RW
|
0x0
|
4:0 |
UsbMaxTxBurstSize_Prd
|
USB Maximum Periodic ESS TX Burst Size - Host Mode Only When UsbTxThrNumPktSel_Prd is 1, this field specifies the Maximum Periodic OUT burst the controller can execute. When the system bus is slower than the USB, TXFIFO can underrun during a long burst. Note: This field can only be set to 2, 4, 8 or 16. |
RW
|
0x0
|