GRXTHRCFG 

         Global Rx Threshold Control Register
  
  There is an issue when ACK TP with NumP=0 followed by ACK TP with NumP=1 without ERDY TP sent by the device controller during a Burst BULK OUT transfer. This may cause third-party 3.0 host controllers to keep waiting for the ERDY TP.
  
  The USB 3.0 Specification states that "When an endpoint is not in a flow control condition, it shall not send an ERDY TP unless the endpoint is a Bulk endpoint that supports streams." In this case, after the device sent the ACK TP (nump=1), the endpoint was not in the flow control, so it did not send an ERDY.
  
  The device would have sent ERDY if the next OUT packet was not received. When the next OUT packet was received, at that time there was enough buffer space to accept it, so the device accepted the packet by informing host that it is no longer in the flow control. The Host should wait for the responses for all the OUT packets to return and then decide if the endpoint is still in flow control or not.
  
  The USB 3.1 Specification supersedes all the USB 3.0 specification. The errata states that "If the host continues, or resumes, transactions to an endpoint, the endpoint shall re-evaluate its flow control state and respond appropriately." However, there are no ECNs on the USB 3.0 for this issue.
  
  To work around this issue, the Global Rx Threshold mode must be disable by setting GRXTHRCFG.UsbRxPktCntSel = '0'. Instead, software can program the DCFG.NUMP mode (where fixed NUMP is transmitted always) instead of the RX threshold based nump mode to prevent the device from sending ACK TP with NumP=0. The NUMP in the ACK TP is the minimum value of (DCFG.NUMP, bMaxBurstSize) for each endpoint.
  
  IN Transfer Concurrency: When threshold mode is enabled, the Host controller disables IN transfer concurrency. The Host controller will execute IN transfers to one endpoint at a time in order to adhere to the maximum throughput limit specified by the threshold settings.
  
  Note:
   - GRXTHRCFG register is not applicable for Debug Target.
   - For more information on threshold settings, see the <link:ext>DWC_usb31_databook:rx_tx_threshold,"Rx and Tx Threshold Settings"</link> section in the <link:ext>DWC_usb31_databook:Title,Databook</link>.
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000 0x1100C100 0x1100C10C

Size: 32

Offset: 0xC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

reserved_31_27

RW 0x0

UsbRxPktCntSel

RW 0x0

UsbRxPktCnt

RW 0x7

UsbMaxRxBurstSize

RW 0x10

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

UsbRxThrNumPktSel_HS_Prd

RW 0x0

UsbRxThrNumPkt_HS_Prd

RW 0x0

reserved_12_11

RW 0x0

UsbRxThrNumPktSel_Prd

RW 0x0

UsbRxThrNumPkt_Prd

RW 0x0

UsbMaxRxBurstSize_Prd

RW 0x0

GRXTHRCFG Fields

Bit Name Description Access Reset
31:27 reserved_31_27 
Reserved
 RW 0x0
26 UsbRxPktCntSel 
USB Async ESS Receive Packet Threshold Enable - Host/Device Modes
  
  This field enables/disables the USB reception multi-packet thresholding:
   - 0: The controller can only start reception on the USB when the RXFIFO has space for at least one packet.
   - 1: The controller can only start reception on the USB when the RXFIFO has space for at least USBRxPktCnt amount of packets. This mode is valid in both host and device mode. It is only used for Enhanced SuperSpeed. 
  In device mode, 
   - Setting this bit to 1 also enables the functionality of reporting NUMP in the ACK/ERDY TP based on the RXFIFO space instead of reporting a fixed NUMP derived from DCFG.NUMP for Bulk OUT endpoints.
   - If you are using external buffer control (EBC) feature, disable this mode by setting USBRxPktCntSel to 0.
 RW 0x0
25:21 UsbRxPktCnt 
USB Async ESS Receive Packet Threshold Count - Host/Device Modes
  
  In host mode, this field specifies the space (in terms of the number of packets) that must be available in the RXFIFO before the controller can start the corresponding USB RX transaction (burst). 
  
  In device mode, this field specifies the space (in terms of the number of packets) that must be available in the RXFIFO before the controller can send ERDY for a flow-controlled Bulk OUT endpoints.
  
  This field is valid only when the USB Async ESS Receive Packet Threshold Enable field is set to 1. The valid values for this field are from 1 to 16. 
  
  Note: This field must be less than or equal to the USB Maximum Receive Burst Size field.
 RW 0x7
20:16 UsbMaxRxBurstSize 
USB Async ESS Maximum Receive Burst Size - Host/Device Modes
  
  In host mode, this field specifies the Maximum Bulk IN burst the DWC_usb31 controller can perform. 
  
  When the system bus is slower than the USB, RXFIFO can overrun during a long burst. 
  
  You can program a smaller value to this field to limit the RX burst size that the controller can perform. It only applies to ESS Bulk endpoints in the host mode. 
  
  In device mode, this field specifies the NUMP value that is sent in ERDY for a Bulk OUT endpoint. The programmed value should not exceed the RxFIFO size.
  
  This field is valid only when USBRxPktCntSel is 1. The valid values for this field are from 1 to 16.
 RW 0x10
15 UsbRxThrNumPktSel_HS_Prd 
USB HS High Bandwidth Periodic Receive Packet Threshold Enable - Host Mode Only
  
  This field enables/disables the USB reception multi-packet thresholding:
   - 0: USB HS High Bandwidth Periodic Receive multi-packet thresholding is disabled; The controller can start reception on the USB as soon as the RXFIFO has space for one packet.
   - 1: USB HS High Bandwidth Periodic Receive multi-packet thresholding is enabled; the controller can only start reception on the USB when the RXFIFO has space for at least UsbRxThrNumPkt_HS_Prd amount of packets. This mode is valid in host mode for high speed high bandwidth periodic endpoints. 
  
  Note: The intent of using this bit is only when the system bus is slow and not able to cater to the data rate of High-Bandwidth endpoint (3076 bytes/uframe). If the system bus is slow, and if all the transactions of a High-Bandwidth endpoint could not be executed successfully, it would likely cause a compliance test failure (section 5.4.x of xHCI Compliance Test Specification). This issue is seen only with older PCI based USB-IF compliance devices.
 RW 0x0
14:13 UsbRxThrNumPkt_HS_Prd 
USB HS High Bandwidth Periodic Receive Packet Threshold Count - Host Mode Only
  This field specifies the maximum number of packet space needed in the RXFIFO before the controller can start a HS Periodic High Bandwidth USB transaction.
  This field is valid only when USBRxPktCntSel_HS_Prd is 1. The valid values for this field are from 1 to 3.
 RW 0x0
12:11 reserved_12_11 
Reserved
 RW 0x0
10 UsbRxThrNumPktSel_Prd 
USB Periodic ESS Receive Packet Threshold Enable - Host Mode Only. This field should be programmed to 0 in Device mode.
  
  This field enables/disables the Periodic ESS USB reception multi-packet thresholding:
   - 0: USB Periodic ESS Receive multi-packet thresholding is disabled; the controller can start reception on the USB as soon as the RXFIFO has space for one packet.
   - 1: USB Periodic ESS Receive multi-packet thresholding is enabled; the controller can only start reception on the USB when the RXFIFO has space for at least UsbRxThrNumPkt_Prd amount of packets. 
  This mode is valid only in host mode. It is only used for ESS.
 RW 0x0
9:5 UsbRxThrNumPkt_Prd 
USB Periodic ESS Receive Packet Threshold Count - Host Mode Only. This field should be programmed to 0 in Device mode.
  
  This field specifies the minimum number of packet space needed in the RXFIFO before the controller can start a ESS periodic high-bandwidth USB transaction. This field is valid only when the USB Periodic ESS Receive Packet Threshold Enable field is set to 1. Valid values are from 1 to 16.
  
  Note: This field must be less than or equal to the USB Maximum Periodic RX Burst Size field.
 RW 0x0
4:0 UsbMaxRxBurstSize_Prd 
USB Maximum Periodic ESS RX Burst Size - Host Mode Only. This field should be programmed to 0 in Device mode.
  
  When UsbRxThrNumPktSel_Prd is 1, this field specifies the Maximum ESS Periodic IN burst the controller can execute. When the system bus is slower than the USB, RXFIFO can overrun during a long burst.
 RW 0x0