GHWPARAMS6

         Global Hardware Parameters Register 6
  
  This register contains the hardware configuration options that you can select in the coreConsultant GUI.  
  
  Note: 
   - For a description of each parameter, refer to the "Parameter Descriptions" chapter in the <link:ext>DWC_usb31_databook:Title,Databook</link>. This information is also available in coreConsultant by right-clicking the parameter label and selecting "What's This" or by clicking the Help tab.  
   - Some of the global hardware parameters are not currently modifiable in coreConsultant. These settings are in the  <workspace>/src/${ldsg}_params.svh file; you must not change them.


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100C100`	`0x1100C158`

Size: 32

Offset: 0x58

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`ghwparams6_31_16` `RO 0x1971`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`BusFltrsSupport` `RO 0x1`	`ghwparams6_14_10` `RO 0x0`					`ghwparams6_9_8` `RO 0x0`		`ghwparams6_7` `RO 0x0`	`ghwparams6_6` `RO 0x0`	`ghwparams6_5_0` `RO 0x3F`

GHWPARAMS6 Fields


Bit	Name	Description	Access	Reset
31:16	`ghwparams6_31_16`	`DWC_USB31_RAM0_DEPTH	`RO`	`0x1971`
15	`BusFltrsSupport`	`DWC_USB31_EN_BUS_FILTERS	`RO`	`0x1`
14:10	`ghwparams6_14_10`	Reserved	`RO`	`0x0`
9:8	`ghwparams6_9_8`	Reserved	`RO`	`0x0`
7	`ghwparams6_7`	`DWC_USB31_EN_FPGA	`RO`	`0x0`
6	`ghwparams6_6`	`DWC_USB31_EN_DBG_PORTS	`RO`	`0x0`
5:0	`ghwparams6_5_0`	`DWC_USB31_PSQ_FIFO_DEPTH	`RO`	`0x3F`