GHWPARAMS5

         Global Hardware Parameters Register 5
  
  This register contains the hardware configuration options that you can select in the coreConsultant GUI.  
  
  Note: 
   - For a description of each parameter, refer to the "Parameter Descriptions" chapter in the <link:ext>DWC_usb31_databook:Title,Databook</link>. This information is also available in coreConsultant by right-clicking the parameter label and selecting "What's This" or by clicking the Help tab.  
   - Some of the global hardware parameters are not currently modifiable in coreConsultant. These settings are in the  <workspace>/src/${ldsg}_params.svh file; you must not change them.


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100C100`	`0x1100C154`

Size: 32

Offset: 0x54

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`ghwparams5_31_29` `RO 0x3`			`ghwparams5_28_23` `RO 0x10`						`ghwparams5_22_17` `RO 0x20`						`ghwparams5_16_11` `RO 0x20`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`ghwparams5_16_11` `RO 0x20`					`ghwparams5_10_5` `RO 0x20`						`ghwparams5_4_0` `RO 0x10`

GHWPARAMS5 Fields


Bit	Name	Description	Access	Reset
31:29	`ghwparams5_31_29`	`DWC_USB31_NUM_RAMS	`RO`	`0x3`
28:23	`ghwparams5_28_23`	`DWC_USB31_DFQ_FIFO_DEPTH	`RO`	`0x10`
22:17	`ghwparams5_22_17`	`DWC_USB31_DWQ_FIFO_DEPTH	`RO`	`0x20`
16:11	`ghwparams5_16_11`	`DWC_USB31_TXQ_FIFO_DEPTH	`RO`	`0x20`
10:5	`ghwparams5_10_5`	`DWC_USB31_RXQ_FIFO_DEPTH	`RO`	`0x20`
4:0	`ghwparams5_4_0`	`DWC_USB31_BMU_BUSGM_DEPTH	`RO`	`0x10`