GHWPARAMS3

         Global Hardware Parameters Register 3
  
  This register contains the hardware configuration options that you can select in the coreConsultant GUI.  
  
  Note: 
   - For a description of each parameter, refer to the "Parameter Descriptions" chapter in the Databook. This information is also available in coreConsultant by right-clicking the parameter label and selecting "What's This" or by clicking the Help tab.  
   - Some of the global hardware parameters are not currently modifiable in coreConsultant. These settings are in the  <workspace>/src/${ldsg}_params.svh file; you must not change them.
      
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000 0x1100C100 0x1100C14C

Size: 32

Offset: 0x4C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ghwparams3_31

RO 0x0

ghwparams3_30_23

RO 0x20

ghwparams3_22_18

RO 0x10

ghwparams3_17_12

RO 0x20

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ghwparams3_17_12

RO 0x20

ghwparams3_11

RO 0x0

ghwparams3_10

RO 0x1

ghwparams3_9_8

RO 0x0

ghwparams3_7_6

RO 0x2

ghwparams3_5_4

RO 0x0

ghwparams3_3_2

RO 0x2

ghwparams3_1_0

RO 0x2

GHWPARAMS3 Fields

Bit Name Description Access Reset
31 ghwparams3_31
Reserved
RO 0x0
30:23 ghwparams3_30_23
`DWC_USB31_CACHE_TOTAL_XFER_RESOURCES
RO 0x20
22:18 ghwparams3_22_18
`DWC_USB31_NUM_IN_EPS
RO 0x10
17:12 ghwparams3_17_12
`DWC_USB31_NUM_EPS
RO 0x20
11 ghwparams3_11
Reserved
RO 0x0
10 ghwparams3_10
DWC_USB31_VENDOR_CTL_INTERFACE
RO 0x1
9:8 ghwparams3_9_8
Reserved
RO 0x0
7:6 ghwparams3_7_6
`DWC_USB31_HSPHY_DWIDTH
RO 0x2
5:4 ghwparams3_5_4
Reserved
RO 0x0
3:2 ghwparams3_3_2
`DWC_USB31_HSPHY_INTERFACE
RO 0x2
1:0 ghwparams3_1_0
`DWC_USB31_SSPHY_INTERFACE
RO 0x2