GEVNTCOUNT

         Global Event Buffer Count Register
  
  This register holds the number of valid bytes in the Event Buffer. During initialization, software must initialize the count by writing 0 to the Event Count field. Each time the hardware writes a new event to the Event Buffer, it increments this count. Most events are four bytes, but some events may span over multiple four byte entries. Whenever the count is greater than zero, the hardware raises the corresponding interrupt line (depending on the EvntIntMask bit in the GEVNTSIZn register). On an interrupt, software processes one or more events out of the Event Buffer. Afterwards, software must write the Event Count field with the number of bytes it processed.
  
  Clock crossing delays may result in the interrupt's continual assertion after software acknowledges the last event. Therefore, when the interrupt line is asserted, software must read the GEVNTCOUNT register and only process events if the GEVNTCOUNT is greater than 0.


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100C100`	`0x1100C10C`

Size: 32

Offset: 0xC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`EVNT_HANDLER_BUSY` `RW 0x0`	`reserved_30_16` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`EVNTCOUNT` `RW 0x0`

GEVNTCOUNT Fields

Bit Name Description Access Reset

Bit	Name	Description	Access	Reset
31	`EVNT_HANDLER_BUSY`	Event Handler Busy Device software event handler busy indication. The controller sets this bit when the interrupt line is asserted due to pending events. Software clears this bit (with 1'b1) when it has finished processing the events (along with updating the EVNTCOUNT in this register). The controller does not raise the interrupt line for a new event unless this bit is cleared. Note: When Interrupt moderation is disabled (that is, DEVICE_IMODI = 0), this bit is ignored.	`RW`	`0x0`
30:16	`reserved_30_16`	Reserved_30_16	`RO`	`0x0`
15:0	`EVNTCOUNT`	Event Count (EVNTCount) When read, returns the number of valid events in the Event Buffer (in bytes). When written, hardware decrements the count by the value written. The interrupt line remains high when count is not 0.	`RW`	`0x0`

EVNT_HANDLER_BUSY

Event Handler Busy
  
  Device software event handler busy indication. The controller sets this bit when the interrupt line is asserted due to pending events. Software clears this bit (with 1'b1) when it has finished processing the events (along with updating the EVNTCOUNT in this register). The controller does not raise the interrupt line for a new event unless this bit is cleared.
  
  Note: When Interrupt moderation is disabled (that is, DEVICE_IMODI = 0), this bit is ignored.

RW

0x0

30:16

reserved_30_16

Reserved_30_16

RO

0x0

15:0

EVNTCOUNT

Event Count (EVNTCount)
  
  When read, returns the number of valid events in the Event Buffer (in bytes).
  
  When written, hardware decrements the count by the value written.
  
  The interrupt line remains high when count is not 0.

RW

0x0