GDBGLSPMUX 

         Global Debug LSP MUX Register in host mode
  
  This register is for internal use only.
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_gbl__SEG_L4_AHB_USB1_0x0_0x100000 0x1100C100 0x1100C170

Size: 32

Offset: 0x70

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

reserved_31_24

RO 0x0

logic_analyzer_trace

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

reserved_15

RO 0x0

LSPSELECT

RW 0x0

GDBGLSPMUX Fields

Bit Name Description Access Reset
31:24 reserved_31_24 
Reserved_31_24
 RO 0x0
23:16 logic_analyzer_trace 
logic_analyzer_trace Port MUX Select
  
  For details on how the mux controls the debug traces, refer to the "assign logic_analyzer_trace =" code section in the DWC_usb31.v file.
  
  A value of 6'h3F drives 0s on the logic_analyzer_trace signal. If you plan to OR (instead using a mux) this signal with other trace signals in your system to generate a common trace signal, you can use this feature.
RW 0x0
15 reserved_15 
Reserved_15
 RO 0x0
14:0 LSPSELECT 
LSP Select
  In host mode:
   - [14:0] - Selects the LSP debug information presented in the GDBGLSP register.
  
  In device mode:
   - [3:0] - Device Endpoint Select (EPSELECT)
  
  Selects the Endpoint debug information presented in the GDBGEPINFO registers in device mode
   - [7:4] - Device LSP Select (DEVSELECT)
  
  Selects the LSP debug information presented in the GDBGLSP register
   - [14:8] - Host LSP Select
  
  Selects the LSP debug information presented in the GDBGLSP register
RW 0x0