DEVTEN

         Device Event Enable Register
   - This register controls the generation of device-specific events (see <link:ext>08_Descriptors.fm:event_buffer_content_devt,"Event Buffer Content for Device-Specific Events (DEVT)"</link> section in the Programming Guide). 
   - If an enable bit is set to 0, the event will not be generated.


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_dev__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100C700`	`0x1100C708`

Size: 32

Offset: 0x8

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`reserved_31_16` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`LDMEVTEN` `RW 0x0`	`L1WKUPEVTEN` `RW 0x0`	`reserved_13` `RO 0x0`	`VENDEVTSTRCVDEN` `RW 0x0`	`reserved_11` `RW 0x0`	`reserved_10` `RW 0x0`	`ERRTICERREVTEN` `RW 0x0`	`L1SUSPEN` `RW 0x0`	`SOFTEVTEN` `RW 0x0`	`U3L2L1SuspEn` `RW 0x0`	`HibernationReqEvtEn` `RW 0x0`	`WKUPEVTEN` `RW 0x0`	`ULSTCNGEN` `RW 0x0`	`CONNECTDONEEVTEN` `RW 0x0`	`USBRSTEVTEN` `RW 0x0`	`DISSCONNEVTEN` `RW 0x0`

DEVTEN Fields


Bit	Name	Description	Access	Reset
31:16	`reserved_31_16`	Reserved_31_16	`RW`	`0x0`
15	`LDMEVTEN`	LDM Response Event Enable. Enables interrupt when response to LDM request is receievd.	`RW`	`0x0`
14	`L1WKUPEVTEN`	L1 Resume Detected Event Enable. Note: If GUCTL1[DEV_DECOUPLE_L1L2_EVT] is enabled, then this bit is for L1 Resume Detected Event Enable.	`RW`	`0x0`
13	`reserved_13`	Reserved	`RO`	`0x0`
12	`VENDEVTSTRCVDEN`	Vendor Device Test LMP Received Event (VndrDevTstRcvedEn)	`RW`	`0x0`
11	`reserved_11`	Reserved_11	`RW`	`0x0`
10	`reserved_10`	Reserved_10	`RW`	`0x0`
9	`ERRTICERREVTEN`	Erratic Error Event Enable	`RW`	`0x0`
8	`L1SUSPEN`	L1 Suspend Event Enable Note: Only if GUCTL1[DEV_DECOUPLE_L1L2_EVT] is enabled, this bit is for L1 Suspend Event Enable.	`RW`	`0x0`
7	`SOFTEVTEN`	Start of (u)frame	`RW`	`0x0`
6	`U3L2L1SuspEn`	U3/L2-L1 Suspend Event Enable.	`RW`	`0x0`
5	`HibernationReqEvtEn`	This bit enables/disables the generation of the Hibernation Request Event.	`RW`	`0x0`
4	`WKUPEVTEN`	Resume/Remote Wakeup Detected Event Enable.	`RW`	`0x0`
3	`ULSTCNGEN`	USB/Link State Change Event Enable	`RW`	`0x0`
2	`CONNECTDONEEVTEN`	Connection Done Enable	`RW`	`0x0`
1	`USBRSTEVTEN`	USB Reset Enable	`RW`	`0x0`
0	`DISSCONNEVTEN`	Disconnect Detected Event Enable	`RW`	`0x0`