DALEPENA 

         Device Active USB Endpoint Enable Register. 
  
  This register indicates whether a USB endpoint is active in a given configuration or interface.
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_dev__SEG_L4_AHB_USB1_0x0_0x100000 0x1100C700 0x1100C720

Size: 32

Offset: 0x20

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

USBACTEP

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

USBACTEP

RW 0x0

DALEPENA Fields

Bit Name Description Access Reset
31:0 USBACTEP 
USBACTEP   
  
  USB Active Endpoints (USBActEP)
  
  This field indicates if a USB endpoint is active in the current configuration and interface. It applies to USB IN endpoints 0.15 and OUT endpoints 0.15, with one bit for each of the 32 possible endpoints. Even numbers are for USB OUT endpoints, and odd numbers are for USB IN endpoints, as follows:
   - Bit[0]: USB EP0-OUT
   - Bit[1]: USB EP0-IN
   - Bit[2]: USB EP1-OUT
   - Bit[3]: USB EP1-IN
  The entity programming this register must set bits 0 and 1 because they enable control endpoints that map to physical endpoints (resources) after USBReset.
  
  Hardware clears these bits for all endpoints (other than EP0-OUT and EP0-IN) after detecting a USB reset event. After receiving SetConfiguration and SetInterface requests, the application must program endpoint registers accordingly and set these bits.
  
  For more information, see the <link:ext>DWC_usb31_databook:flex_ep_mapping,"Flexible Endpoint Mapping"</link> section in the <link:ext>DWC_usb31_databook:Title,Databook</link>.
RW 0x0