BLOOPBCKTFERSZ

         Loopback Transfer Size Register


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_debug__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100D800`	`0x1100D904`

Size: 32

Offset: 0x104

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`reserved_31_24` `RO 0x0`								`loopback_xfer_sz` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`loopback_xfer_sz` `RW 0x0`

BLOOPBCKTFERSZ Fields

Bit Name Description Access Reset

31:24

Bit	Name	Description	Access	Reset
31:24	`reserved_31_24`	Reserved	`RO`	`0x0`
23:0	`loopback_xfer_sz`	Loopback Transfer Size The loopback logic uses this field information for size of data to transfer. In SW mode, the transfer size in TRB and loopback transfer size should match MAX_PACKET_SIZE value. In BIST mode, the loopback transfer size should match MAX_PACKET_SIZE value configured.	`RW`	`0x0`

reserved_31_24

Reserved

RO

0x0

23:0

loopback_xfer_sz

Loopback Transfer Size
  
   The loopback logic uses this field information for size of data to transfer.
  
   In SW mode, the transfer size in TRB and loopback transfer size should match MAX_PACKET_SIZE value.
  
   In BIST mode, the loopback transfer size should match MAX_PACKET_SIZE value configured.

RW

0x0