BBISTXFERSTS1

         BIST Transfer Status Register 1 
  
   Note : BIST Transfer Status contains 4 DWORD distributed over four 32 bit register BBISTXFERSTS0,BBISTXFERSTS1,BBISTXFERSTS2,BBISTXFERSTS3


Module Instance	Base Address	Register Address
`i_usb31_0__ahb_slave__11000000__DWC_usb31_block_debug__SEG_L4_AHB_USB1_0x0_0x100000`	`0x1100D800`	`0x1100D914`

Size: 32

Offset: 0x114

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`reserved_31_24` `RO 0x0`								`failed_pending_trans_size` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`failed_pending_trans_size` `RO 0x0`

BBISTXFERSTS1 Fields


Bit	Name	Description	Access	Reset
31:24	`reserved_31_24`	Reserved	`RO`	`0x0`
23:0	`failed_pending_trans_size`	Failed Pending Transfer Size	`RO`	`0x0`