PORTSC_30 

         Port Status and Control Register Bit Definitions
  
  The PORTSC Register Access fails (Timeout) if the UTMI/ULPI clock is not running or one of the following bits is asserted.
   - PR
   - ORC
   - WPR
Module Instance Base Address Register Address
i_usb31_0__ahb_slave__11000000__DWC_usb31_block_Host_Cntrl_Port_Reg_Set__SEG_L4_AHB_USB1_0x0_0x100000 0x11000420 0x11000420

Size: 32

Offset: 0x

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

WPR

RW 0x0

DR

RO 0x0

reserved_29_28

RO 0x0

WOE

RW 0x0

WDE

RW 0x0

WCE

RW 0x0

CAS

RO 0x0

CEC

RW 0x0

PLC

RW 0x0

PRC

RW 0x0

OCC

RW 0x0

WRC

RW 0x0

PEC

RW 0x0

CSC

RW 0x0

LWS

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

PIC

RW 0x0

PORTSPEED

RO 0x0

PP

RW 0x0

PLS

RW 0x0

PR

RW 0x0

OCA

RO 0x0

reserved_2

RO 0x0

PED

RW 0x0

CCS

RO 0x0

PORTSC_30 Fields

Bit Name Description Access Reset
31 WPR 
Reset Value
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1. 
  
  Programming this field with random data will cause side effect i.e. Register Access will fail (Timeout) if the pipe clock is not running or reset is asserted . Bit Bash register testing is not recommended.
 RW 0x0
30 DR 
Reset Value
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
RO 0x0
29:28 reserved_29_28 
Reserved_29_28
 RO 0x0
27 WOE 
WOE
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
26 WDE 
WDE
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
25 WCE 
WCE
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
24 CAS 
Cold Attach Status
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RO 0x0
23 CEC 
CEC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
22 PLC 
PLC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
21 PRC 
PRC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
  
  Programming this field with random data will cause side effect. Bit Bash register testing is not recommended.
 RW 0x0
20 OCC 
OCC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
19 WRC 
WRC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
18 PEC 
PEC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
17 CSC 
CSC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
16 LWS 
LWS
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
15:14 PIC 
PIC
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
13:10 PORTSPEED 
PORTSPEED
  
   Note: PORTSPEED for Enhanced SuperSpeed 10Gbps is 5
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RO 0x0
9 PP 
PP
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
8:5 PLS 
PLS
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
4 PR 
PR
  
   Programming this field with random data will cause side effect. Bit Bash register testing is not recommended.
 RW 0x0
3 OCA 
OCA
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RO 0x0
2 reserved_2 
Reserved_2
 RO 0x0
1 PED 
PED
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RW 0x0
0 CCS 
CCS
  
  For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.1.
 RO 0x0