CRS63
CRS63 - Host Controller Version/Slot Interrupt Status
| Module Instance | Base Address | Register Address |
|---|---|---|
i_sdmmc__sdmmc_apb_slv__10808000____CRS____SEG_L4_MP_sdmmc_s_0x0_0x1000
|
0x108082FC
|
0x108082FC
|
Size: 32
Offset: 0x
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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CRS63 Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:24 |
Reserved_2
|
Reserved bitfield added by Magillem |
RO
|
0x0
|
| 23:16 |
SVN
|
SVN - Specification Version Number.\n
This field identifies the Host Controller Specification Version.\n
[list] [*] 0h - Version 1.00 [*] 1h - Version 2.00 [*] 2h - Version 3.00 [*] 3h - Version 4.00 [*] 4h - Version 4.10 [*] 5h - Version 4.20 [*] 6h-FFh - reserved [/list]
|
RO
|
0x5
|
| 15:1 |
Reserved_1
|
Reserved bitfield added by Magillem |
RO
|
0x0
|
| 0 |
ISES
|
ISES - Interrupt Signal For Each Slot.\n
This field informs whether Interrupt or Wake-Up signal is active.
|
RO
|
0x0
|