MAC_Packet_Filter

Receive All.
  
  When this bit is set, the MAC Receiver module passes all the received packets to the application, irrespective of whether they pass the address filter or not. The result of the SA or DA filtering is updated (pass or fail) in the corresponding bit in the Rx Status Word.
  
  When this bit is reset, the Receiver module passes only those packets to the application that pass the SA or DA address filter.

Reserved.

Reserved.

Drop Non-TCP/UDP over IP Packets.
  
  When this bit is set, the MAC drops the non-TCP or UDP over IP packets. The MAC forward only those packets that are processed by the Layer 4 filter. When this bit is reset, the MAC forwards all non-TCP or UDP over IP packets.
  
  When support for L2 Virtualized network over L3 Network is enabled,
   - If VNE=1 and VNM=0, all non VxLAN type packets and all non-TCP/UDP type normal packets are dropped.
   - If VNE=1 and VNM=1, all non NVGRE type packets and all non-TCP/UDP type normal packets are dropped.
   - If VNE=0, all non-TCP/UDP type normal packets are dropped.
  Note:  When this bit is set in NVGRE mode (when VNE=1, VNM=1), NVGRE packets (which are also non-TCP/UDP) are not dropped.

Layer 3 and Layer 4 Filter Enable.
  
  When this bit is set, the MAC drops packets that do not match the enabled Layer 3 and Layer 4 filters. If Layer 3 or Layer 4 filters are not enabled for matching, this bit does not have any effect.
  
  When this bit is reset, the MAC forwards all packets irrespective of the match status of the Layer 3 and Layer 4 fields.

Reserved.

VLAN Tag Filter Enable.
  
  When this bit is set, the MAC drops the VLAN tagged packets that do not match the VLAN Tag. When this bit is reset, the MAC forwards all packets irrespective of the match status of the VLAN Tag.

Reserved.

DA Hash Index or L3/L4 Filter Number in Receive Status.
  
  This field selects either DA hash index, L3/L4 filter number or both information to provide in receive descriptor.
  
  Values: 0x0: Use both backward compatible DA hash index and L3/L4 filter number fields in receive status.
  
  For its proper usage, program DA hash table and number of L3/L4 filters in such way that these index fields can be accommodated respective index/number.
  
  0x1: Use combined DA hash table index and L3/L4 filter number fields to provide only DA hash table index.
  
  0x2: Use combined DA hash table index and L3/L4 filter number fields to provide only L3/L4 filter number.
  
  0x3: Reserved.

Hash or Perfect Filter.
  
  When this bit is set, the address filter passes a packet if it matches either the perfect filtering or hash filtering as set by the HMC or HUC bit.
  
  When this bit is reset and the HUC or HMC bit is set, the packet is passed only if it matches the Hash filter.

Source Address Filter Enable.
  
  When this bit is set, the MAC compares the SA field of the received packets with the values programmed in the enabled MAC_Address registers. If the comparison fails, the MAC drops the packet.
  
  When this bit is reset, the MAC forwards the received packet to the application with updated SAF bit of the Rx Status depending on the SA address comparison.
  
  Note:  According to the IEEE specification, Bit 47 of the SA is reserved. However, in DWC_xgmac, the MAC compares all 48 bits. The software driver must consider this while programming the MAC address registers for SA.

SA Inverse Filtering.
  
  When this bit is set, the Address Check block operates in the inverse filtering mode for SA address comparison. If the SA of a packet matches the values programmed in the MAC_Address registers, it is marked as failing the SA Address filter.
  
  When this bit is reset, if the SA of a packet does not match the values programmed in the MAC_Address registers, it is marked as failing the SA Address filter.

Pass Control Packets.
  
  These bits control the forwarding of all control packets (including unicast and multicast Pause packets).
   - 00: The MAC filters all control packets from reaching the application.
   - 01: The MAC forwards all control packets except Pause packets to the application even if they fail the Address filter.
   - 10: The MAC forwards all control packets to the application even if they fail the Address filter.
   - 11: The MAC forwards the control packets that pass the Address filter. 
  When G9991 Ethernet encapsulated mode is enabled, this is true for DFC control packets (when both OPCODE and TIME field matches it is DFC Pause packet and when Type field matches it is DFC generic control packet).
  
  When G9991 native mode is enabled, these bits control the forwarding of DFC PAUSE packets (when both OPCODE and TIME field matches it is DFC Pause packet and the DFC generic control packet definition is not valid in this case as the Type field is not present) as follows:
   - 00/01: The MAC filters all DFC Pause packets from reaching the application.
   - 10/11: The MAC forwards all the DFC Pause packets to application.

Disable Broadcast Packets.
  
  When this bit is set, the AFM module blocks all incoming broadcast packets. In addition, it overrides all other filter settings.
  
  When this bit is reset, the AFM module passes all the received broadcast packets.

Pass All Multicast.
  
  When this bit is set, it indicates that all the received packets with a multicast destination address (first bit in the destination address field is 1) are passed. 
  When this bit is reset, filtering of multicast packet depends on HMC bit.

DA Inverse Filtering.
  
  When this bit is set, the Address Check block operates in inverse filtering mode for the DA address comparison for both unicast and multicast packets. 
  When this bit is reset, normal filtering of packets is performed.

Hash Multicast.
  
  When this bit is set, the MAC performs the destination address filtering of received multicast packets according to the hash table.
  
  When this bit is reset, the MAC performs the perfect destination address filtering for multicast packets, that is, it compares the DA field with the values programmed in MAC_Address registers.

Hash Unicast.
  
  When this bit is set, the MAC performs the destination address filtering of unicast packets according to the hash table.
  
  When this bit is reset, the MAC performs a perfect destination address filtering for unicast packets, that is, it compares the DA field with the values programmed in MAC_Address registers.

Promiscuous Mode.
  
  When this bit is set, the Address Filtering module passes all incoming packets irrespective of the destination or source address. The MAC clears the SA or DA Filter Fail status bits of the Rx Status Word when PR is set.