rf_controller_params Summary

Base Address: 0x10B80800

Register

Address Offset

Bit Fields
i_nand__reg_apb__10b80000__rf_controller_params__SEG_L4_MP_nand_s_0x0_0x10000

ctrl_version

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

hpnfc_magic_number

RO 0x6019

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ctrl_fix

RO 0x2

ctrl_rev

RO 0xE

ctrl_features_reg

0x4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_20

RO 0x0

nf_16b_supp

RO 0x1

Reserved

nvddr

RO 0x1

async_supp

RO 0x1

n_banks

RO 0x3

sfr_intf

RO 0x2

dma_data_width

RO 0x1

dma_addr_width

RO 0x1

dma_intf

RO 0x0

ecc_available

RO 0x1

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

pre_fetch_available

RO 0x1

di_par_available

RO 0x1

ext_cmd_cnt

RO 0x0

rmp_available

RO 0x1

ext_status

RO 0x1

control_data

RO 0x1

write_protect

RO 0x1

di_crc_available

RO 0x1

Reserved_1

RO 0x0

n_threads

RO 0x3

manufacturer_id

0x8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_2

RO 0x0

dId

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

mId

RO 0x0

nf_device_areas

0x12

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

spare_area_size

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

main_area_size

RO 0x1000

device_params_0

0x16

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

device_type

RO 0x0

Reserved_3

RO 0x0

bits_per_cell

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

plane_addr_bits

RO 0x0

no_of_luns

RO 0x1

device_params_1

0x20

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ReadId_6

RO 0x0

ReadId_5

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ReadId_4

RO 0x0

ReadId_3

RO 0x0

device_features

0x24

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

optional_commands

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

device_features

RO 0x0

device_blocks_per_lun

0x28

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

no_of_blocks

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

no_of_blocks

RO 0x0

device_revision

0x32

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

revisions

RO 0x0

onfi_timing_modes_0

0x36

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_2

RO 0x0

nv_ddr_modes

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

sdr_modes

RO 0x0

onfi_timing_modes_1

0x40

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

nv_ddr3_modes

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

nv_ddr2_modes

RO 0x0

onfi_iterlv_op_attr

0x44

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

iterlv_op

RO 0x0

onfi_sync_opt_0

0x48

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

onfi_tccs_min

RO 0xFFFF

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

nvddr_supp_ft

RO 0x0

onfi_sync_opt_1

0x52

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_1

RO 0x0

adv_cmd_supp

RO 0x0

bch_cfg_0

0x56

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

bch_corr_3

RO 0x40

bch_corr_2

RO 0x20

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

bch_corr_1

RO 0x10

bch_corr_0

RO 0x8

bch_cfg_1

0x60

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

bch_corr_7

RO 0x0

bch_corr_6

RO 0x82

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

bch_corr_5

RO 0x60

bch_corr_4

RO 0x48

bch_cfg_2

0x64

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

bch_sect_1

RO 0x400

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

bch_sect_0

RO 0x800

bch_cfg_3

0x68

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

bch_syndrome_factor

RO 0x10

bch_metadata_size

RO 0x28

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

bch_chien_factor

RO 0x8

bch_brlk_factor

RO 0x6